Why Probabilistic Computing?¶
Imagine you need to multiply two numbers that each lie between 0 and 1 โ say image pixel intensities, neural activations, or channel soft-bits. In classical binary arithmetic you build a wide multiplier array. In stochastic computing (SC) you instead encode each value as a random bitstream whose density of 1s equals that value, then multiply with a single AND gate.
graph LR
A["Value A = 0.75<br/>bitstream ~11101110โฆ"] --> AND["AND gate"]
B["Value B = 0.50<br/>bitstream ~10101010โฆ"] --> AND
AND --> C["Product โ 0.375<br/>density of 1s"]
The catch: you wait \(N\) clock cycles for a good estimate, and the answer is noisy. When the application already tolerates noise โ neural nets, vision, iterative decoding โ that trade can win on area and energy.
The energy intuition¶
CMOS energy is paid per toggled transistor. A 16ร16 binary multiplier toggles thousands of gates every cycle. An SC multiplier toggles one gate per cycle for \(N\) cycles. If \(N\) is modest (tens to hundreds) and the rest of the SoC is memory-bound or already approximate, SC can be attractive.
SC also pairs naturally with compute-in-memory and unary datapaths where values are already pulse-density coded.
What you get โ and what you pay¶
+------------------------------------------------------------------+
| WIN: tiny arithmetic ยท soft-error softening ยท easy nonlinearity |
| PAY: latency (N cycles) ยท RNG / SNG cost ยท correlation bugs |
+------------------------------------------------------------------+
| Property | Binary exact | Stochastic / probabilistic |
|---|---|---|
| Multiply (unipolar) | Large array | AND (if independent) |
| Add (scaled) | Adder tree | MUX / OR / accumulator hybrids |
| Precision | Bit-width \(W\) | Stream length \(N\) (and encoding) |
| Errors | Hard faults hurt MSB | Many flips โ small density change |
Interactive lab: bitstream multiply¶
Drag the two probabilities and watch an AND-based unipolar multiplier estimate the product from a finite stream:
Where to go next¶
- Bitstream Encoding Made Easy โ unipolar vs bipolar
- Correlation & Independence โ why shared LFSRs break products
- Hardware Taxonomies โ circuit families with DOI citations
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